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proxmark3/fpga
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iceman1001 141ab65f78 chg: compiled binary fpga lf
2019-07-31 16:14:50 +02:00
..
tests
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2019-07-30 22:51:38 +02:00
clk_divider.v
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2019-07-30 22:51:38 +02:00
fpga_hf.bit
FPGA Hi-Simulate: Added 212kHz SSP-Clock option
2018-09-05 23:01:55 +02:00
fpga_hf.v
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2019-07-30 22:51:38 +02:00
fpga_lf.bit
chg: compiled binary fpga lf
2019-07-31 16:14:50 +02:00
fpga_lf.v
Add: 'fpga LF ADC path' - a major mode for LF ADC path
2019-07-31 15:50:10 +02:00
fpga.ucf
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go.bat
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hi_flite.v
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2019-07-30 22:51:38 +02:00
hi_iso14443a.v
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hi_read_rx_xcorr.v
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hi_read_tx.v
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hi_simulate.v
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hi_sniffer.v
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lf_edge_detect.v
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2019-07-30 22:51:38 +02:00
lo_adc.v
Add: 'fpga LF ADC path' - a major mode for LF ADC path
2019-07-31 15:50:10 +02:00
lo_edge_detect.v
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2019-07-30 22:51:38 +02:00
lo_passthru.v
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lo_read.v
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lo_simulate.v
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2019-07-30 22:51:38 +02:00
lp20khz_1MSa_iir_filter.v
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2019-07-30 22:51:38 +02:00
Makefile
Cleaner makefile execution, use 'make Q=' if you want to see full lines
2019-06-02 00:25:25 +02:00
min_max_tracker.v
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2019-07-30 22:51:38 +02:00
sim.tcl
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testbed_fpga.v
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2019-07-30 22:51:38 +02:00
testbed_hi_read_tx.v
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2019-07-30 22:51:38 +02:00
testbed_hi_simulate.v
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testbed_lo_read.v
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2019-07-30 22:51:38 +02:00
testbed_lo_simulate.v
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2019-07-30 22:51:38 +02:00
util.v
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xst_hf.scr
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xst_lf.scr
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xst_nfc.scr
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