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..

tests

plotedge script: warn for numpy, matplotlib

2020-02-21 16:10:18 +01:00

clk_divider.v

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fpga_felica.bit

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fpga_felica.v

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fpga_hf.bit

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fpga_hf.v

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fpga_lf.bit

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fpga_lf.v

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fpga.ucf

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go.bat

THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.

2014-06-20 01:02:59 +02:00

hi_flite.v

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hi_get_trace.v

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hi_iso14443a.v

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hi_reader.v

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hi_simulate.v

make style

2020-08-13 12:25:04 +02:00

hi_sniffer.v

fgpa changes from official repo. Had to split felica into its own image. Leading to three bit files created.

2020-07-02 11:47:46 +02:00

lf_edge_detect.v

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lo_adc.v

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lo_edge_detect.v

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lo_passthru.v

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lo_read.v

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lo_simulate.v

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lp20khz_1MSa_iir_filter.v

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Makefile

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min_max_tracker.v

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sim.tcl

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testbed_fpga.v

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testbed_hi_read_tx.v

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testbed_hi_simulate.v

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testbed_lo_read.v

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testbed_lo_simulate.v

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util.v

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xst_felica.scr

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xst_hf.scr

THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.

2014-06-20 01:02:59 +02:00

xst_lf.scr

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