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macros for divisors and fix lf optimal freq display

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This commit is contained in:
Philippe Teuwen
2019-10-03 18:25:21 +02:00
parent 6df9eea950
commit f29ad0fba2
4 changed files with 15 additions and 9 deletions
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4
armsrc/appmain.c
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@@ -182,10 +182,10 @@ void MeasureAntennaTuning(void) {
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);
SpinDelay(20);
uint32_t adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
if (i == 96)
if (i == LF_DIVISOR_125)
payload.v_lf125 = adcval; // voltage at 125kHz
if (i == 89)
if (i == LF_DIVISOR_134)
payload.v_lf134 = adcval; // voltage at 134kHz
if (i == sc->divisor)