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Merge branch 'master' into experimental_varlen

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* master:
  rename usb_present
  TestProxmark only if OpenProxmark returned pm3 present
  Trying original SPI mode for 24MHz flash mem
  text
This commit is contained in:
Philippe Teuwen
2019-04-26 23:30:30 +02:00
parent 3b6a249646 897632a717
commit e9bfc3eb7a
7 changed files with 31 additions and 26 deletions
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6
armsrc/appmain.c
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@@ -371,8 +371,8 @@ void SendVersion(void) {
// measure the USB Speed by sending SpeedTestBufferSize bytes to client and measuring the elapsed time.
// Note: this mimics GetFromBigbuf(), i.e. we have the overhead of the PacketCommandNG structure included.
void printUSBSpeed(void) {
DbpStringEx(FLAG_LOG|FLAG_ANSI, _BLUE_("USB Speed"));
Dbprintf(" Sending USB packets to client...");
DbpStringEx(FLAG_LOG|FLAG_ANSI, _BLUE_("Transfer Speed"));
Dbprintf(" Sending packets to client...");
#define USB_SPEED_TEST_MIN_TIME 1500 // in milliseconds
uint8_t *test_data = BigBuf_get_addr();
@@ -392,7 +392,7 @@ void printUSBSpeed(void) {
Dbprintf(" Time elapsed............%dms", end_time - start_time);
Dbprintf(" Bytes transferred.......%d", bytes_transferred);
Dbprintf(" USB Transfer Speed PM3 -> Client = %d Bytes/s", 1000 * bytes_transferred / (end_time - start_time));
Dbprintf(" Transfer Speed PM3 -> Client = " _YELLOW_("%d") " bytes/s", 1000 * bytes_transferred / (end_time - start_time));
}
/**

9
armsrc/flashmem.c
View File

@@ -80,10 +80,14 @@ void FlashSetup(uint32_t baudrate) {
uint8_t csaat = 1;
uint32_t dlybct = 0;
uint8_t ncpha = 1;
uint8_t cpol = 0;
if (baudrate > FLASH_MINFAST) {
baudrate = FLASH_FASTBAUD;
//csaat = 0;
dlybct = 1500;
ncpha = 0;
cpol = 0;
}
AT91C_BASE_SPI->SPI_CSR[2] =
@@ -119,9 +123,10 @@ void FlashSetup(uint32_t baudrate) {
1 0 1 1 clock normally low read on falling edge
2 1 0 0 clock normally high read on falling edge
3 1 1 1 clock normally high read on rising edge
Update: for 24MHz, writing is more stable with ncpha=1, else bitflips occur.
*/
(0 << 1) | // Clock Phase data captured on leading edge, changes on following edge
(0 << 0); // Clock Polarity inactive state is logic 0
(ncpha << 1) | // Clock Phase data captured on leading edge, changes on following edge
(cpol << 0); // Clock Polarity inactive state is logic 0
// read first, empty buffer
if (AT91C_BASE_SPI->SPI_RDR == 0) {};