fix divisor<>freq computations, add q to lf tune

This commit is contained in:
Philippe Teuwen
2019-10-03 21:18:37 +02:00
parent f29ad0fba2
commit df08e7970c
5 changed files with 55 additions and 28 deletions

View File

@@ -1473,7 +1473,7 @@ static void PacketReceived(PacketCommandNG *packet) {
break;
}
case CMD_MEASURE_ANTENNA_TUNING_LF: {
if (packet->length != 1)
if (packet->length != 2)
reply_ng(CMD_MEASURE_ANTENNA_TUNING_LF, PM3_EINVARG, NULL, 0);
switch (packet->data.asBytes[0]) {
@@ -1481,7 +1481,7 @@ static void PacketReceived(PacketCommandNG *packet) {
// Let the FPGA drive the low-frequency antenna around 125kHz
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95);
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, packet->data.asBytes[1]);
reply_ng(CMD_MEASURE_ANTENNA_TUNING_LF, PM3_SUCCESS, NULL, 0);
break;
case 2:

View File

@@ -29,7 +29,7 @@ sample_config config = { 1, 8, 1, LF_DIVISOR_125, 0, 0 } ;
void printConfig() {
uint32_t d = config.divisor;
DbpString(_BLUE_("LF Sampling config"));
Dbprintf(" [q] divisor.............%d ( "_GREEN_("%d.%02d kHz")")", d, 12000 / d, ((1200000 + d/2) / d) - ((12000 / d) * 100));
Dbprintf(" [q] divisor.............%d ( "_GREEN_("%d.%02d kHz")")", d, 12000 / (d+1), ((1200000 + (d+1)/2) / (d+1)) - ((12000 / (d+1)) * 100));
Dbprintf(" [b] bps.................%d", config.bits_per_sample);
Dbprintf(" [d] decimation..........%d", config.decimation);
Dbprintf(" [a] averaging...........%s", (config.averaging) ? "Yes" : "No");