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This commit is contained in:
iceman1001
2020-01-12 17:30:29 +01:00
parent ed67936892
commit 6fa188062c
6 changed files with 22 additions and 22 deletions
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6
armsrc/fpgaloader.h
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@@ -25,7 +25,7 @@
Communication between ARM / FPGA is done inside armsrc/fpgaloader.c (function FpgaSendCommand)
Send 16 bit command / data pair to FPGA
The bit format is: C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
where
where
C is 4bit command
D is 12bit data
@@ -33,7 +33,7 @@
bit | 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-----+-------------------------------------------
cmd | x x x x
major| x x x
major| x x x
opt | x x
divi | x x x x x x x x
thres| x x x x x x x x
@@ -71,7 +71,7 @@ thres| x x x x x x x x
#define FPGA_MAJOR_MODE_OFF (7<<5) // D
// Options for LF_READER
#define FPGA_LF_ADC_READER_FIELD 0x1
#define FPGA_LF_ADC_READER_FIELD 0x1
// Options for LF_EDGE_DETECT
#define FPGA_CMD_SET_EDGE_DETECT_THRESHOLD FPGA_CMD_SET_USER_BYTE1

12
armsrc/lfsampling.c
View File

@@ -54,26 +54,26 @@ void printConfig() {
void setSamplingConfig(sample_config *sc) {
// decimation (1-8) how many bits of adc sample value to save
if (sc->decimation > 0 && sc->decimation < 8)
if (sc->decimation > 0 && sc->decimation < 8)
config.decimation = sc->decimation;
// bits per sample (1-8)
if (sc->bits_per_sample > 0 && sc->bits_per_sample < 8)
if (sc->bits_per_sample > 0 && sc->bits_per_sample < 8)
config.bits_per_sample = sc->bits_per_sample;
//
if (sc->averaging > -1)
config.averaging = (sc->averaging > 0) ? 1 : 0;
// Frequency divisor (19 - 255)
if (sc->divisor > 18 && sc->divisor < 256)
config.divisor = sc->divisor;
// Start saving samples when adc value larger than trigger_threshold
if (sc->trigger_threshold > -1)
if (sc->trigger_threshold > -1)
config.trigger_threshold = sc->trigger_threshold;
// Skip n adc samples before saving
// Skip n adc samples before saving
if (sc->samples_to_skip > -1)
config.samples_to_skip = sc->samples_to_skip;