Merge branch 'master' of https://github.com/Proxmark/proxmark3
Conflicts: armsrc/lfops.c client/cmddata.c client/cmdlf.c client/cmdlft55xx.c client/cmdlft55xx.h client/scripts/test_t55x7_bi.lua
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@@ -1085,11 +1085,11 @@ void T55xxWriteBit(int bit)
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// Write one card block in page 0, no lock
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void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
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{
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uint32_t i = 0;
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uint32_t i = 0;
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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LFSetupFPGAForADC(0, true);
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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LFSetupFPGAForADC(0, true);
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// Now start writting
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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@@ -1122,20 +1122,28 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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}
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void TurnReadLFOn(){
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Give it a bit of time for the resonant antenna to settle.
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SpinDelayUs(8*150);
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}
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// Read one card block in page 0
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void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
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{
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uint32_t i = 0;
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uint8_t *dest = BigBuf_get_addr();
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uint16_t bufferlength = BigBuf_max_traceLen();
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if ( bufferlength > T55xx_SAMPLES_SIZE )
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bufferlength = T55xx_SAMPLES_SIZE;
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if ( bufferlength > T55xx_SAMPLES_SIZE )
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bufferlength = T55xx_SAMPLES_SIZE;
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memset(dest, 0x80, bufferlength);
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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LFSetupFPGAForADC(0, true);
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// Clear destination buffer before sending the command
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memset(dest, 0x80, bufferlength);
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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LFSetupFPGAForADC(0, true);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelayUs(START_GAP);
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@@ -1154,40 +1162,40 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
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T55xxWriteBit(Block & i);
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// Turn field on to read the response
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TurnReadLFOn();
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TurnReadLFOn();
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// Now do the acquisition
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i = 0;
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for(;;) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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LED_D_ON();
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}
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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++i;
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LED_D_OFF();
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if (i >= bufferlength) break;
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i++;
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LED_D_OFF();
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if (i >= bufferlength) break;
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}
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}
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cmd_send(CMD_ACK,0,0,0,0,0);
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cmd_send(CMD_ACK,0,0,0,0,0);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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LED_D_OFF();
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}
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// Read card traceability data (page 1)
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void T55xxReadTrace(void){
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uint32_t i = 0;
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uint32_t i = 0;
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uint8_t *dest = BigBuf_get_addr();
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uint16_t bufferlength = BigBuf_max_traceLen();
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if ( bufferlength > T55xx_SAMPLES_SIZE )
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bufferlength = T55xx_SAMPLES_SIZE;
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if ( bufferlength > T55xx_SAMPLES_SIZE )
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bufferlength= T55xx_SAMPLES_SIZE;
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memset(dest, 0x80, bufferlength);
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LFSetupFPGAForADC(0, true);
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// Clear destination buffer before sending the command
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memset(dest, 0x80, bufferlength);
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LFSetupFPGAForADC(0, true);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelayUs(START_GAP);
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@@ -1196,24 +1204,25 @@ void T55xxReadTrace(void){
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T55xxWriteBit(1); //Page 1
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// Turn field on to read the response
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TurnReadLFOn();
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TurnReadLFOn();
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// Now do the acquisition
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for(;;) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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LED_D_ON();
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}
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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++i;
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LED_D_OFF();
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if (i >= bufferlength) break;
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i++;
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LED_D_OFF();
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if (i >= bufferlength) break;
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}
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}
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cmd_send(CMD_ACK,0,0,0,0,0);
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cmd_send(CMD_ACK,0,0,0,0,0);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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LED_D_OFF();
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}
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